1. Field of the Invention
The present disclosure relates to a thin film transistor (hereinafter, referred to as TFT), and more particularly, to a thin film transistor which is suitable as a switching element or driving element for a semiconductor device, as well as for a display device, such as an organic light emitting diode (hereinafter, OLED) and a liquid crystal display device (hereinafter, LCD), and a method for fabricating the same.
2. Background of the Invention
Displays such as an organic light emitting diode (OLED) and liquid crystal display (LCD) may have a thin film transistor (TFT) as a switching element or driving element.
Conventionally, amorphous silicon TFTs (a-Si TFTs) are used as driving and switching elements for displays. Conventional a-Si TFTs are elements that may be formed relatively uniformly on substrates greater than about 2 m×2 m in area at relatively low costs and are widely used as driving and switching elements. With recent trends towards larger-sized and higher image quality displays, TFTs require higher performance. But, conventional a-Si TFTs with mobility of about 0.5 cm2/Vs may be limited in their application. In this regard, higher-performance TFTs with higher mobility than conventional a-Si TFTs and technologies for fabricating such higher-performance TFTs may be needed. When a polysilicon thin film transistor is used as a channel layer of a thin film transistor, its electron mobility is excellent, but its fabrication process is difficult and its fabrication cost is high.
Accordingly, new TFT technologies having the merits of amorphous silicon thin film transistors and the merits of polysilicon thin film transistors are required.
Recently, a thin film transistor using a semiconductor oxide as a channel was proposed. An oxide TFT has higher mobility than an a-Si TFT, and its fabrication process is simpler than that of a poly-Si TFT and its fabrication cost is low. Hence, the oxide TFT is highly useful as a liquid crystal display (LCD) and an organic light emitting diode (OLED).
In this regard, a conventional thin film transistor structure will be described below with reference to FIGS. 1 and 2.
FIG. 1 is a plan view of a thin film transistor structure according to the prior art.
FIG. 2 is a cross-sectional view of the thin film transistor structure according to the prior art, taken along line II-II of FIG. 1.
As shown in FIGS. 1 and 2, a conventional bottom gate type thin film transistor includes a gate electrode 13 patterned on a substrate 11 to have a given width and length, a gate insulating film 15 formed over the entire surface of the substrate 11 including the gate electrode 13, an active pattern 17a made of a semiconductor oxide patterned in a given shape on the gate insulating film 15 above the gate electrode 13, an etch stop film pattern 19a formed on the active pattern 17a so as to overlap a top portion of the gate electrode 13, a source electrode 21a formed on the etch stop film pattern 19a, active layer 17a, and gate insulating film 15 so as to overlap one side of the top of the gate electrode 13, and a drain electrode 21b formed on the etch stop film pattern 19a, active layer 17a, and gate insulating film 15 so as to overlap the other side of the top of the gate electrode 13.
The drain electrode 21b is separate from the source electrode by a predetermined distance. In a liquid crystal display, though not shown, the gate electrode 13 protrudes from a gate line (not shown) having one direction, and the source electrode 21a protrudes from a data line (not shown).
A method for fabricating a thin film transistor according to the prior art will be described below with reference to FIGS. 3a to 3e. 
FIGS. 3a to 3e are cross-sectional views of a fabrication process of a thin film transistor structure according to the prior art.
Referring to FIG. 3a, a conductive metal material is deposited on a substrate 11 to form a first metal material layer (not shown), and then the first metal material layer is selectively patterned through a first mask process to form a gate electrode 13.
Next, referring to FIG. 3b, an inorganic insulating material is deposited on the substrate 10 with the gate electrode 13 formed thereon, and then a semiconductor oxide is deposited on the gate insulating film 15 to form an active layer 17.
Next, referring to FIG. 3c, the active layer 17 is selectively patterned through a second mask process to form an active pattern 17a, and an insulating material is deposited over the entire surface of the substrate including the active pattern 17a to form an etch stop film 19.
Next, referring to FIG. 3d, the etch stop film 19 is selectively patterned through a third mask process to thereby form an etch stop film pattern 19a overlapping the top of the gate electrode 13.
Subsequently, a conductive metal material is deposited over the entire surface of the substrate including the etch stop film pattern 19a to form a second metal material layer 21.
Next, referring to FIG. 3e, the second metal material layer 21 is selectively patterned through a fourth mask process to form a source electrode 21a and a drain electrode 21b separated from each other, thereby completing the fabrication of an oxide TFT according to the prior art. The source electrode 21a is formed on the etch stop film pattern 19a, active layer 17a, and gate insulating film 15 so as to is overlap one side of the top of the gate electrode 13, and the drain electrode is formed on the etch stop film pattern 19a, active layer 17a, and gate insulating film 15 so as to overlap the other side of the top of the gate electrode 13.
FIG. 4 schematically shows graphs of drain current versus gate voltage according to the thin film transistor structure of the prior art.
Graphs A and B are graphs of drain current versus gate voltage, in which the graph A shows a variation in the current flowing the source electrode to the drain electrode, and the graph B shows a variation in the current flowing the drain electrode to the source electrode.
Accordingly, as shown in FIG. 4, it can be found that there is a large difference between the variation in the current flowing the source electrode to the drain electrode and the variation in the current flowing the drain electrode to the source electrode. Especially, there occurs a difference in overlap width between the source and drain electrodes overlapping the gate electrode due to misalignment during the fabrication of a thin film transistor. Such a difference in overlap width causes a variation in drain current versus gate voltage. That is, due to misalignment, there is a shift by a given width between the graph A of current flowing the source electrode S to the drain electrode and D and the graph B of current flowing the drain electrode D to the source electrode S.
FIG. 5 schematically shows graphs of drain current versus voltage (drain-source voltage) according to the thin film transistor structure of the prior art.
Referring to FIG. 5, there occurs a difference in overlap width between the source and drain electrodes overlapping the gate electrode due to misalignment during the fabrication of a thin film transistor. Hence, it can be found that, as shown in “C”, the drain current Id is not kept constant and the output saturation characteristics are not good.
As discussed above, the TFT structure and the method for fabricating the same according to the prior art have the following problems.
According to the TFT structure and the method for fabricating the same according to the prior art, there occurs a difference in overlap width between the source and drain electrodes overlapping the gate electrode due to misalignment during the fabrication of a thin film transistor. Such a difference in overlap width causes a variation in drain current versus gate voltage. That is, due to misalignment, there is a shift by a given width between the graph A of current flowing the source electrode S to the drain electrode and D and the graph B of current flowing the drain electrode D to the source electrode S, and the output saturation characteristics are not good. This results in severe mura, afterimage, and picture quality degradation when the TFT structure of the prior art is applied to the OLED.
Moreover, when the TFT structure of the prior art is applied to the OLED, if the current level is low, this leads to an increase in power consumption with respect to the same voltage during organic light emission